This invention relates generally to correlation processing in receiver devices and more particularly to a programmable correlator co-processing device.
Communications issues are driving changes in the design and application of electronic devices such as digital processors. As the demand for fast, reliable, low power communications solutions increases, tradeoffs inevitably come into play. One tradeoff is device floorplan or area and power consumption. In general, the more electronic components, i.e., gates, needed to implement a device, the more power the device requires. Fewer gates means less power but, the application may not be as efficiently executed as it could be. A particularly large power consumption function in most digital receiver application is the correlation function. Thus, this area is ideal for re-designing for gains in efficiency.
What is needed is a low power, area efficient device that performs correlations on demand.
The present invention is a digital transmissions receiver system which includes a digital transmissions receiver and a correlation co-processor. The correlation co-processor performs correlation operations at the request of the digital transmissions receiver. Power consumption in the correlation co-processor is reduced by performing the requested correlation operations in stages. The number of stages used is inversely proportional to the number of gates required to implement the correlation function. Thus, the more stages used, the fewer the gates required. This, in turn, provides lower power consumption as compared with a non-staged implementation of the correlation function. Various types of correlations may be performed as indicated by correlation control signals received from the digital transmissions receiver. A correlation controller, included in the correlation co-processor, keeps track of the various stages and with the data appropriate to each stage. When all of the stages necessary to process a particular piece of data are complete, the recovered symbol rate data is stored in an output buffer to await symbol rate processing by the digital transmissions receiver.
These and other features of the invention that will be apparent to those skilled in the art from the following detailed description of the invention, taken together with the accompanying drawings.